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  1. Csepp 🌢 (csepp@merveilles.town)'s status on Saturday, 05-Jun-2021 15:36:24 CEST Csepp 🌢 Csepp 🌢
    in reply to
    • Wim 🈂️
    • Norikawa

    @norikawa cc @wim_v12e ?

    In conversation Saturday, 05-Jun-2021 15:36:24 CEST from merveilles.town permalink
    • Norikawa (norikawa@merveilles.town)'s status on Saturday, 05-Jun-2021 15:36:25 CEST Norikawa Norikawa

      Anyone have any good resources for learning Verilog?

      I'm randomly getting back into little hardware design stuff it seems like!

      I'd prefer VHDL honestly, but last I checked, the resources and software for it were just far more limited than Verilog, but if you have anything for VHDL too feel free to lmk!

      In conversation Saturday, 05-Jun-2021 15:36:25 CEST permalink

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